Abstract:
Continuing advances in technology now make it possible to build high performance network routers with unprecedented capabilities. Features like per flow queueing and fair packet scheduling can be implemented cost-effectively, even in backbone routers with 10 Gb/s links and multi-terabit throughputs. The ability to embed high performance processor cores within ASICs and FPGAs is making it practical to implement substantial amounts of processing within network routers, converting them from simple bit forwarders to powerful Network Services Platforms, capable of implementing a wide range of advanced services.
The networking community has been slow to recognize the impact of these changes. Many researchers continue to believe that backbone routers must be kept simple in order to achieve high performance. This misconception has led to a separation of backbone networks into core and edge devices, a separation that complicates network administration and inhibits a transition to more automated network operation.
This talk will present an architecture for a high performance Network Services Platform that can operate at the performance levels needed in the network core, while providing the networking features commonly associated with edge routers plus the flexible processing infrastructure needed to support advanced network services.

About the Speaker:
Jonathan S. Turner received the MS and PhD degrees in computer science from Northwestern University in 1979 and 1981. He holds the Henry Edwin Sever Chair of Engineering at Washington University, and is Director of the Applied Research Laboratory. The Applied Research Laboratory is currently engaged in a variety of projects ranging from Dynamically Extensible, Networks to Optical Burst Switching.
He served as Chief Scientist for Growth Networks, a startup company that developed scalable switching components for Internet routers and ATM switches, before being acquired by by Cisco Systems in early 2000.
Professor Turner's primary research interest is the design and analysis of routers and switching systems, with special interest in architectures for multicast switching. His research interests also include the study of algorithms and computational complexity, with particular interest in the probable performance of heuristic algorithms for NP-complete problems.
Turner is a fellow of ACM and a fellow of the IEEE. He received the Koji Kobayashi Computers and Communications Award from the IEEE in 1994 and the IEEE Millennium Medal in 2000. He has been awarded more than 20 patents for his work on switching systems and has many widely cited publications.