Technical Program
Final program for HPSR
Download the PDF version.
Time Sun 13 Mon 14 Tue 15 Wed 16
7:30-8:00 Shuttle to UTD Shuttle to UTD Shuttle to UTD
8:00-8:30 Shuttle to UTD Breakfast &
Registration
TI-Auditorium
(ECSS2.102)
Breakfast &
Registration
TI-Auditorium
(ECSS2.102)
Breakfast &
Registration
TI-Auditorium
(ECSS2.102)
8:30-8:45 Registration
TI-Auditorium
(ECSS2.102)
Opening Conference Session 4
TI-Auditorium
(ECSS2.102)
Session 7
TI-Auditorium
(ECSS2.102)
8:45-9:00 Keynote Speech
Prof. George Varghese
9:00-9:45 Tutorial 1
TI-Auditorium
(ECSS2.102)
9:45-10:00 Coffee Break
10:00-10:15 Session 1
TI-Auditorium
(ECSS2.102)
Coffee Break Coffee Break
10:15-10:30 Session 5
TI-Auditorium
(ECSS2.102)
Session 8
TI-Auditorium
(ECSS2.102)
10:30-10:45 Coffee Break
10:45-11:45 Tutorial 1
TI-Auditorium
(ECSS2.102)
11:45-12:00 Lunch 1
UTD-SU Dinning
(SU 2.905)
Lunch 2
UTD-SU Dinning
(SU 2.905)
12:00-12:15 Closing Conference
12:15-12:30 Shuttle to Hotel
12:30-12:45 Lunch
UTD-SU Dinning
(SU 2.905)
12:45-13:15
13:15-13:30 Session 2
TI-Auditorium
(ECSS2.102)
Session 6
(ECSS 2.312)
13:30-14:45 Tutorial 2
TI-Auditorium
(ECSS2.102)
14:45-15:00 Coffee Break Coffee Break
15:00-15:15 Coffee Break Session 3
TI-Auditorium
(ECSS2.102)
Panel 2
(ECSS 2.312)
15:15-16:30 Tutorial 2
TI-Auditorium
(ECSS2.102)
16:30-16:45 TC Meeting
(ECSS 2.312)
16:45-17:00 Coffee Break
17:00-17:30 Shuttle to Hotel Panel 1
TI-Auditorium
(ECSS2.102)
17:30-18:00 Transportation to Museum
18:00-18:30 Reception & Registration
The Renaissance Dallas Richardson Hotel
18:30-19:00 Shuttle to Hotel Tour of Museum
19:00-20:00 Dinner 1
The Renaissance Dallas Richardson Hotel

Dinner 2
(@ Museum)
20:00-20:30 Students returning to UTD
20:30-21:00
21:00-21:30 Students returning to UTD Transportation to Hotel
21:30-22:00




Location: TI-Auditorium (ECSS 2.102) at UTDallas
Speaker: Prof. George Varghese

Abstract: Even commercial router vendors have adopted randomized algorithms in a few cases because of their simplicity, speed, and memory-efficiency. in a few cases. Further, because of the opportunity to see every member of population (i.e., every arriving packet) and preserve summary information about the entire population, such randomized algorithms can obtain an "edge" over standard algorithms that merely sample the population. I illustrate this thesis by three algorithms. First, I will describe a simple algorithm for finding sources that send a large proportion of traffic, and its application in a worm detection chip. Second, I will describe an algorithm that provides an inexpensive technique for measuring the average and variance of packet latencies and loss on a link. By contrast, the majority of routers have no support for fine-grained latency measurement; managers must instead rely on approximate methods such as sending probe packets or using "tomographic" techniques. If time permits, I will describe a third algorithm which allows scalable logging, say of millions of network addresses infected after an attack, using only a small amount of memory. In all three case I will quantify the edge obtained over simple sampling.

Bio: George Varghese worked at DEC for several years designing DECNET protocols and products (bridge architecture, Gigaswitch) before obtaining his Ph.D in 1992 from MIT. He worked from 1993-1999 at Washington University. He joined UCSD in 1999, where he currently is a professor of computer science. He won the ONR Young Investigator Award in 1996, and was elected to be a Fellow of the Association for Computing Machinery (ACM) in 2002. Together with colleagues, he has 16 patents awarded in the general field of Network Algorithmics. Several of the algorithms he has helped develop have found their way into commercial systems including Linux (timing wheels), the Cisco GSR (DRR), and Microsoft Windows (IP lookups). He also helped design the lookup engine for Procket's 40 Gbps forwarding engine. He has written a book on building fast router and endnode implementations called "Network Algorithmics". In May 2004, he co-founded NetSift Inc. which was acquired by Cisco Systems in 2005.



Chair: Eiji Oki, The University of Electro-Communications, Tokyo, JP
Location: TI-Auditorium (ECSS 2.102) at UTDallas

  1. Software Emulation of Programmable Optical Routers
    • Walter Cerroni (Universita' di Bologna, IT);
    • Carla Raffaelli (University of Bologna, IT);
    • Michele Savi (University of Bologna, IT).
  2. Implementation of a Simplified Network Processor
    • Qiang Wu (University of Massachusetts, US);
    • Danai Chasaki (University of Massachusetts, US);
    • Tilman Wolf (University of Massachusetts, US)
  3. Efficient Singlecast / Multicast Method For Active Optical Access Network Using PLZT High-speed Optical Switches
    • Kunitaka Ashizawa (Keio University, JP);
    • Kazumasa Tokuhashi (Keio University, JP);
    • Daisuke Ishii (Keio University, JP);
    • Satoru Okamoto (Keio University, JP);
    • Naoaki Yamanaka (Keio University, JP);
    • Eiji Oki (The University of Electro-Communications, JP)
  4. Cost Analysis of DWDM Multi-Mode Switching Routers
    • Vikram Shete (University of Houston, US);
    • Yiyong Zha (University of Houston, US);
    • Lei Wang (University of Houston, US);
    • Yuhua Chen (University of Houston, US)
  5. A Virtual Switch Architecture for Hosting Virtual Networks on the Internet
    • Fabienne Anhalt (Ecole Normale Supérieure de Lyon - INRIA, FR);
    • Dinil Mon Divakaran (ENS Lyon, INRIA, FR);
    • Pascale Vicat-Blanc Primet (INRIA, FR)



Chair: Nikolaos Ioa. Chrysos, IBM Zurich Research Laboratory, CH
Location: TI-Auditorium (ECSS 2.102) at UTDallas

  1. Designing packet buffers in high-bandwidth switches and routers
    • Dong Lin (Hong Kong University of Science & Technology, HK);
    • Mounir Hamdi (Hong Kong University of Science and Technology, CN);
    • Jogesh Muppala (The Hong Kong University of Science and Technology, HK)
  2. Block-Based Packet Buffer with Deterministic Packet Departures
    • Hao Wang (University of California, San Diego, US);
    • Bill Lin (University of California, San Diego, US)
  3. A Novel Hybrid Memory Architecture with Parallel DRAM for Fast Packet Buffers
    • Arthur Mutter (University of Stuttgart, DE)
  4. Packet Loss Process under Bounded Delay
    • Jianming Liu (GuiLin University of Electronic Technology, CN);
    • Xiaohong Jiang (Tohoku University, JP);
    • Achille Pattavina (Politecnico di Milano, IT)



Chair: Walter Cerroni, Universita' di Bologna, IT
Location: TI-Auditorium (ECSS 2.102) at UTDallas

  1. Computing Alternate Multicast Trees with Maximum Latency Guarantee
    • Limin Tang (University of Texas at Dallas, US);
    • Miguel Razo (University of Texas at Dallas, US);
    • Wanjun Huang (University of Texas at Dallas, US);
    • Arularasi Sivasankaran (University of Texas at Dallas, US);
    • Paolo Monti (The Royal Institute of Technology (KTH), SE);
    • Marco Tacca (University of Texas at Dallas, US);
    • Andrea Fumagalli (UTD, US)
  2. A Fast Multiobjective Genetic Algorithm based Approach for Energy Efficient QoS Routing in Two-tiered Wireless Sensor Networks
    • Gholamhossein Ekbatanifard (Ferdowsi University of Mashhad, IR)
  3. MultiRoute - A Congestion-Aware Routing Protocol
    • Ali Al-Shabibi (CERN, CH); Brian Martin (CERN, CH)
  4. Oblivious Routing and QoS Guarantee in Wireless Mesh Networks
    • Yuanzhe Xuan (HonKong University of Science and Technology, HK);
    • Chin Tau Lea (Hong Kong University of Science and Technology, HK)
  5. Fast Convergence with Fast Reroute in IP Networks
    • James Bedenbaugh (University of South Carolina, US);
    • Glenn Robertson (University of South Carolina, US);
    • Srihari Nelakuditi (University of South Carolina, US)



Chair: Shivendra Panwar, Polytechnic Institute of New York University, US
Location: TI-Auditorium (ECSS 2.102) at UTDallas

  1. Scalability Analysis of NEMO Prefix Delegation-based Schemes
    • Md Shohrab Hossain (University of Oklahoma, US);
    • Abu Zafar M Shahriar (University of Oklahoma, US);
    • Mohammed Atiquzzaman (University of Oklahoma, US)
    • William Ivancic (NASA Glenn Research Center, US)
  2. Architecture-Aware Data Structure Optimization for Power-Efficient IP Lookup
    • Weirong Jiang (University of Southern California, US);
    • Viktor K. Prasanna (University of Southern California, US)
  3. SPADE: Statistical Packet Acceptance Defense Engine
    • Shimrit Tzur-David (The Hebrew University of Jerusalem, IL);
    • Harel Avissar (The Hebrew University, Jerusalem, Israel, IL);
    • Danny Dolev (The Hebrew University of Jerusalem, IL);
    • Tal Anker (The Hebrew University, Jerusalem, Israel, IL)
  4. Towards Optimized Packet Processing for Multithreaded Network Processor
    • Yeim-Kuan Chang (National Cheng Kung University, TW);
    • Fang-Chen Kuo (National Cheng Kung University, TW)



Chair: Andrea Francini, Bell Labs, Alcatel-Lucent, US
Location: TI-Auditorium (ECSS 2.102) at UTDallas

  1. The FPGA Implementation of the Log2(N; 0; p) Switching Fabric Control Algorithm
    • Wojciech Kabacinski (Poznan University of Technology, PL);
    • Marek Michalski (Poznan University of Technology, PL)
  2. Towards Low-Cost High-Performance All-Optical Interconnection Networks
    • Cyriel Minkenberg (IBM Zurich Research Laboratory, CH);
    • Nikolaos Ioa. Chrysos (IBM Zurich Research Laboratory, CH);
    • Jens Hofrichter (IBM Research GmbH, Zurich Research Laboratory, CH);
    • Folkert Horst (IBM Research GmbH, Zurich Research Laboratory, CH);
    • Bert Jan Offrein (IBM Research GmbH, Zurich Research Laboratory, CH)
  3. Resource Allocation in Buffered Crossbar Switches for Supporting Network Virtualization
    • Qiang Duan (The Pennsylvania State University, US)
  4. 2-Dilated Flattened Butterfly : A Nonblocking Switching Network
    • Ajithkumar Thamarakuzhi (University of Connecticut, US);
    • John A Chandy (University of Connecticut, US)



Chair: Wojciech Kabacinski, Poznan University of Technology, PL
Location: ECSS 2.312 at UTDallas

  1. Size-Based Flow Scheduling in a CICQ Switch
    • Dinil Mon Divakaran (ENS Lyon, INRIA, FR);
    • Fabienne Anhalt (Ecole Normale Supérieure de Lyon - INRIA, FR);
    • Eitan Altman (INRIA, FR); Pascale Vicat-Blanc Primet (INRIA, FR)
  2. Packet Scheduling in a Low Latency Optical Packet Switch
    • Lin Liu (State University of New York at Stony Brook, US);
    • Zhenghao Zhang (Florida State University, US);
    • Yuanyuan Yang (Stony Brook University, US)
  3. Designing Fully Distributed Scheduling Algorithms for Contention-Tolerant Crossbar Switches
    • Guannan Qu (Jilin University, P.R. China, US);
    • Hyung Jae Chang (University of Texas at Dallas, US);
    • Jianping Wang (City University of Hong Kong, HK);
    • Zhiyi Fang (Jilin University, CN);
    • Si-Qing Zheng (University of Texas at Dallas, US)
  4. DISQUO: A Distributed 100% Throughput Algorithm for a Buffered Crossbar Switch
    • Shunyuan Ye (Polytechnic University, US);
    • Yanming Shen (Dalian University of Technology, Dalian, P.R. China, CN);
    • Shivendra Panwar (Polytechnic Institute of New York University, US)



Chair: Jason Jue, UTD, Dallas, TX, US
Location: TI-Auditorium (ECSS 2.102) at UTDallas

  1. Scheme to Measure One-way Delay Variation with Detection and Removal of Clock Skew
    • Makoto Aoki (Cyber Creative Institute, JP);
    • Eiji Oki (The University of Electro-Communications, JP);
    • Roberto Rojas-Cessa (New Jersey Institute of Technology, US)
  2. Framed Bit Error Rate Testing for 100G Ethernet Equipment
    • Anders Rasmussen (DTU Fotonik, DK);
    • Sarah Ruepp (Technical University of Denmark, DK);
    • Henrik Wessing (Technical University of Denmark, DK);
    • Michael S. Berger (Technical University of Denmark, DK)
  3. Cost Analysis of Mobility Management Entities for SIGMA
    • Md Shohrab Hossain (University of Oklahoma, US);
    • Mohammed Atiquzzaman (University of Oklahoma, US)
    • William Ivancic (NASA Glenn Research Center, US)
  4. Performance Bounds of Rate-Adaptation Schemes for Energy-Efficient Routers
    • Andrea Francini (Bell Labs, Alcatel-Lucent, US);
    • Dimitrios Stiliadis (Bell Labs, Lucent Technologies, US)



Chair: Si Qing Zheng, UTD, Dallas, TX, US
Location: TI-Auditorium (ECSS 2.102) at UTDallas

  1. 2-SRLG-Connected Partitioning in Optical Networks
    • Mohammad Masud Hasan (University of Texas at Dallas, US);
    • Jason Jue (University of Texas at Dallas, US)
  2. A New Framework for Efficient Shared Segment Protection Scheme for WDM Networks
    • Brigitte Jaumard (Concordia University, CA);
    • Nazmun N Bhuiyan (Concordia University, CA);
    • Samir Sebbah (Concordia University, CA);
    • Florian Huc (Universite de Geneve, CH);
    • David Coudert (INRIA, I3S, CNRS, Université de Nice Sophia, FR)
  3. Capacity Upgrade of Passive Optical Networks with Minimum Cost and System Disruption
    • Marilet De Andrade Jardin (Universitat Politécnica de Catalunya, ES);
    • Massimo Tornatore (University of California, Davis, US);
    • Sebastia Sallent (Universidad Politecnica de Catalunya, ES);
    • Biswanath Mukherjee (Dept. of Computer Science - University of California Davis, US)
  4. Shared Path Protection in GMPLS Networks with Limited Wavelength Conversion Capability
    • Anna V Manolova (Danish Technical University, DK);
    • Sarah Ruepp (Technical University of Denmark, DK);
    • Raul Muñoz (CTTC, ES);
    • Ricardo Martinez (CTTC, ES);
    • Ramon Casellas (Centre Tecnologic de Telecomunicacions de Catalunya, ES);
    • Isabella Cerutti (Scuola Superiore Sant'Anna, IT);
    • Nicola Sambo (Scuola Superiore Sant'Anna, IT);
    • Alessio Giorgetti (Scuola Superiore Sant'Anna, IT);
    • Nicola Andriolli (Scuola Superiore Sant'Anna, IT);
    • Piero Castoldi (Scuola Superiore Sant'Anna, IT)
  5. Advanced Crankback Provisioning for Multi-Domain Networks
    • Nasir Ghani (University of New Mexico, US);
    • Feng Xu (University of New Mexico, US);
    • Mostafa Esmaeili (University of New Mexico, US);
    • Min Peng (Wuhan University, CN)



mnutopshadow

From-To Sun 13 Mon 14 Tue 15 Wed 16
Hotel-UTD 7:50 AM 7:20 AM 7:20 AM 7:20 AM
8:15 AM 7:45 AM 7:45 AM 7:45 AM
UTD-Hotel 5:00 PM 6:30 PM 12:15 PM
5:15 PM 6:45 PM 12:30 PM
Hotel-UTD 8:00 PM 9:00 PM
8:15 PM 9:15 PM
UTD-Museum 5:30 PM
Museum-Hotel 9:00 PM